Dvb-s2 Receiver Symbol Synchronization Technology And Fpga Implementation

Satellite communications plays an important role in the communications industry due to the strongpoint of farther transmission distance,wider range of coverage and less affected by geographical conditions, etc. With the development of communications technology, the challenge of high power,sensitive antenna and complicated communications channel had been conquered, satellite communications had transformed from the traditional military field into dual-use in military and civilian gradually, be seized of broad market prospects. Therefore, the research for satellite communications has become a hot topic. Currently, the standard of the satellite communications is DVB-S or DVB-S2. In a DVB-S2 standard satellite communications system, receiver is a key component, and symbol synchronization of the receiver has performance great influence, it is the key and difficult technical to the receiver. In this context, we studied the receiver's symbol synchronization technology and its FPGA development which based on DVB-S2 standard.This dissertation includes the contents below:1) Studied the receiver's system architecture which based on DVB-S2 standard and researched the symbol time recover technique in the receiver's role. Compared several commonly methods of the symbol time recover and selected one that can figure out the project.2) Researched the symbol time recover technique which based on the DVB-S2 standard, we focus on the key technologies--interpolation filtering and timing error estimation algorithm, searched for a filtering algorithm based on polynomial interpolation, and it had been proved own better performance than the commonly used Lagrange interpolation filtering algorithm. Searched for an improved Gardner timing error estimation algorithm that has faster convergence. In addition, the paper on the interpolation controller and the loop filter had been described, and then completed of the design of the symbol synchronization. 3) Completed the symbol synchronization by Simulink simulation design, simulation result shows that the design method is feasible, indicators can meet the project requirements.4) Completed the FPGA design by the ISE integration development platform.