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The Design Of FPGA_based Digital Beacon Receiver

Posted on:2013-02-14Degree:MasterType:Thesis
Country:ChinaCandidate:C N TangFull Text:PDF
GTID:2218330371957692Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Portable satellite communication earth station can set up the satellite-earth link timely tolong_range data transmission and broadcast,which usually adopt the beacon signal as the mainapproach,while the DVB-S as the alternative way.To overcome the wrong tracking of portable station to wideband communication signalsand save cost,we proposed a FPGA_based design of digital beacon receiver.we developed anlogical algotithm, which can fulfill the purpose of prohibiting wrong tracking,besed on thedifferent frequency spectrum of DVB_S and beacon signal. Refering to Parseval equation,signalcan be processed in both time_field and frequency_field.Compared with FFTcalculation,time_field processing can improve accuracy on the premise that the spectralresolution is met.Through down-conversion, to process the IF signal, the beacon receiver would provide anDC voltage proportional to the power of the beacon signal and sends to the servo control system,completes the antenna satellite tracking. But if we can not confirm the IF signal coming fromthe target satellite not other adjacent satellites, it will easily leads to the wrong satellitetracking. To overcome this potential problem, we adopt such solution which can be discribed asbelow. if we detect the DC voltage exceed the threshold value,we give the local frequecy500kHZ-shift value,we distinguish the type of received_signal through calculating the differenceof the power between the positive_shift frequency and the the negtive_shift one.The approach to design the digital beacon receiver has been proved practicable inexperiments of tracking in portable satellite earth station.
Keywords/Search Tags:Satellite Communications,, Digital Beacon Receiver,FPGA,, Tracking Performance, Verilog HDL
PDF Full Text Request
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