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The Design And Implementation Of The Digital Receiver For Aeronautical Satellites

Posted on:2008-08-01Degree:MasterType:Thesis
Country:ChinaCandidate:L Q ZhangFull Text:PDF
GTID:2178360245492941Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
INMARSAT aeronautical satellite communications system not only provides reliable voice and data communications services for aircraft, but also transmits information about air traffic control and aircraft operations, thereby significantly improving flight safety conditions. Based on the research of INMARSAT aeronautical satellite communications protocols, this paper illuminates the design and implementation of digital receivers for different satellite channels.This paper first introduces INMARSAT satellite communications system components and applications generally, and then analysises the system hardware platform design. FPGA has high speed digital signal processing capability, so it is suitable for the real-time signal processing. Based on Altera's Cyclone II device, the paper illuminates hardware circuit design, and then focuses on the implementation of baseband digital signal processing. Baseband digital signal processing includes several parts, such as frame synchronization, deinterleaver, Viterbi decoding and desramble and so on. Aeronautical satellite communications system has four satellite channels, different channel with different transmission characteristics and channel structure. This paper offers diverse solutions based on the channel characteristics, and discusses the design ideas in detail. The designs are implemented using hardware description language in Quartus II development environment, and the paper also offers the process and simulation results. Finally, this paper introduces the design of Nios II system based on the SOPC Builder development environment, laying the foundation for the software development.The design of digital signal processing can meet the technical requirements provenly after field measurement. This design combines the FPGA high-speed processing capability and embedded processor flexibility, so it can adapt well to rapidly changing standards, protocols and performance requirements. The implementation of the digital receiver provides physical layer data for the research of aeronautical satellite communications system, and has good practical value.
Keywords/Search Tags:Aeronautical Satellite Communications System, FPGA (Field Programmable Gate Array), Digital Signal Processing, Nios II system
PDF Full Text Request
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