Satellite Epirb Test Receiver Design And Realization

This paper describes how to design a low-cost 406MHz/EPIRB test receiver, which can be used for routine testing and maintenance of the EPIRB. The principle of this design consists of three parts:firstly, using the IF digital demodulation technique which can demodulate the receiving the radio signals sending by EPIRB;secondly, decoding the protocol data; finally displaying and printing the preset information of the EPIRB. The main content of this paper includes the following parts:This paper discusses a general implementation of IF digital receiver. Considering the cost, the complexity of hardware and programming flexibility, we choose the IF digital receiver based on PC+data acquisition card instead of the one based on the DSP and FPGA. Also, this article uses the advanced technologies, such as the phase difference demodulation algorithm, the code width, modulation feature detection algorithm and so on. In this way, it can avoid the algorithm of complex digital carrier extraction algorithm, improve the reliability of the element of judgment, and finally verify the correctness of the intermediate frequency demodulation algorithm based on measured data.Besides, to achieve the communication between IF analog signal digitization and PC, this design provides the way that uses USB interface card which works at the 128KSPS sampling rate to receive the data, completes the hardware debugging and programming based on the microcontroller.This paper studies the coding and the testing software via the C++ Builder 5, it is concluded that this design can realize the testing, browsing, displaying and printing functions. The section also describes the data protocol of EPIRB, encoding and decoding principles of BCH codes, provide a theoretical basis for the accuracy of the test datas.