Des Encryption Algorithm Ip Module

With the rapid development of computer and internet Technology, society begins to enter into information age. It is important that information to political, diplomatic, economic, and technology. At present the information capacity, transmission speed has been made great progress, but information security is also faced extreme challenges. It is became the world's problem that How to guarantee the safety of the information system. Nowadays, it is the hot spot that making a research on the high quality of much faster, stronger under the strong support of the modern communication technology, communication security system .The hardware realization of data encryption algorithms is one of the important technical means for constructing the system. Although DES encryption algorithm may be cracked when it faced with the difference analysis, linear analysis and exhaustive key method, according to its own advantages, some relevant products still occupy the market and leading position, and it has been widely used in all kinds of intelligent IC card, ATM, bank POS system, highway toll station terminal, logistics system and many other businesses. The FPGA was used to develop lower cost, faster speed, more versatility and portability DES encryption algorithm IP module is the meaning of the study.In this paper, the GW2C35A type EDA technology experiment development board adaptation is used for test platform, ALTERA Company's type EP2C35F484I8N FPGA chips of Cyclone II is used for the goal chips. Using top-down, string and conversion, assembly line operation design method to complete DES encryption algorithm IP the module. The main content of the study are as follows:1, the basic theory and working mode and development of encryption algorithm DES was researched.2, DES encryption algorithm modules and the auxiliary circuit module UART was described with VHDL language.3, the simulation and the verification testing of each module was achieved with the Quartus II software.4, hardware downloaded, system test of the DES encryption algorithm IP module was achieved.5, the fastest encryption and decryption speed of the IP core of the DES encryption algorithm is 8Gbit/s, take up the 4650 logic unit, and the maximum clock frequency is 129.05 MHz.