Dynamic Coefficients FIR Filter Based On FPGA

Digital filter is the basic unit which is most widely used in communication, digital images, audio signals, pattern recognition. Compared with analog filters, digital filter has lots of advantages, such as higher precision, better stability, more easily changing of the system function, higher flexibility, non-resistance matching problem, easier large-scale integration, enable multi-dimensional filtering and so on. Finite impulse response (FIR) digital filter can realize an arbitrary rate filter of signal, and also can ensure the strict phase characteristics. Due to no feedback from output to input and the unit impulse response is finite, therefore the FIR filter performance is relatively stable.FPGA-based digital filter is based on hardware logic which protects it from any of the problems resulted from software processor performance. And the FPGA allows applications to parallel operations, which greatly improves the speed of operations. According to the significant linear phase and stability characteristics of FIR digital filter, this paper presents a new ideal of dynamic coefficient filter which is based on FPGA. Compared to the traditional operation of addition and multiplication, constructing two lookup-table to implement the multiplication operation so as to take full advantage of a distributed algorithm. One table is used to update the filter coefficients, and the other is used to generate partial products. One table provide results, while the filter coefficients LUT continuously updated filter coefficients to realize filter coefficients dynamic. The filter coefficients can be adjusted in accordance with the requirements of the system at any time, which makes the design becomes efficient and practical.