Fpga Implementation Of Digital Down Conversion

Software Defined Radio (SDR,Software Defined Radio) is the key issue of mobile communication for its benefits of normal hardware platform base on Programmable Logic Deceive (PLD) or Digital Singal Processor (DSP),and flexible function based on software. For ideal software radio system,it is a goal to release digitization at Radio Frequency (RF).Limited by the device processing speed, it is impossible to release software radio at intermediate frequency (IF),DDC based on ASIC or FPGA is adopted to convert RF to IF. Digitalization is carried out at IF. DDC based on ASIC has the advantages of big decimation ration and high steady performance as well as the disadvantages of expensive and low flexibility and can't be widely used in software radio. To improve the processing flexibility, it is necessary to implement DDC by FPGA inspective of ASIC. In DDC's structure design,we obtain inspiration from Intersil Company's ISL5416 chip.Also,we add our Unique FIR design methord in design. Finally, our DDC module getting the better performance, wider input bandwidth , and more adopting channel.Solutions present in the thesis can be summarized as follows:(1)The base theory relatives to DDC such as sampling theory, multi-rate signal processing and signal orthogonal transform theory is analysis based on introduction of DDC technologies.(2)Introduce the key module's implementing methord in DDC base on FPGA and key module's performance in DDC.(3) The realtime parameter design method of DDC is discussed and workable implemention of parameter design is proposed in the thesis.(4)Finishing the DDC design and implements based on FPGA and comparing the performance of DDC and ISL5416 in the same condition.