A Reconfigurable FIR Filter System Based On FPGA

In the modern electrical system, the FIR digital filter, as an important component of digital signal processing technology, is used for many practical applications for its good linear phase character. In engineering practice, there are often real-time and flexible requirements for signal processing. However, software and hardware techniques available for implementation are difficult to meet the demand for both of the aspects in the same time.Along with the development of PLD device and EDA technology, more and more people use FPGA to implement FIR filter, as it not only meet the real-time requirement, but also guarante the Flexibility.The problems commonly existing in these filter are the filter coefficients can't adjusted flexibly to suit the variable filtered signal, so that they can only filter the single characteristic singnal.In this dissertation, a reconfigurable FIR filter system based on FPGA is designed, which combine high-speed operation of FPGA and flexibility of computer using USB2.0 interface. According to the filter specialties, the filter coefficients are calculated by the computer. And the configured coefficients of the multistage FIR filter are downloaded to the chip. The filtering computing is completed by the FPGA. The filtered data is transmitted to the computer through the USB2.0 interface for further processing, such as displaying, analyzing and storing. The states conversion between coefficients configuring mode and filtering mode is finished by FSM (Finite State Machine), which ensures the system to work orderly.The performance testing and application examples are given to verify this system. The experimental results demonstrated that the coefficients configuring of the system is easy, which can adjust the filter coefficients flexibly according to the actual demand, and the filter is effective,that it can effectively filter out the noise signals.