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Design Of Image Compression Network Terminal

Posted on:2012-10-10Degree:MasterType:Thesis
Country:ChinaCandidate:Y WangFull Text:PDF
GTID:2218330368488093Subject:Detection Technology and Automation
Abstract/Summary:PDF Full Text Request
Along with the maturity of image sensor technology and computer network communication technology, network video technology takes a rapid development and gradually opens up broad application space in the fields of education, traffic, industries and so on in recent years. The paper puts forward the design scheme of image compression network terminal based on the actual demand and theoretical analysis.Image compression network terminal is composed of image signal acquisition and digitizing module, video data compression module, network transmission module and image display module. Considering the high speed and flexible port advantage of FPGA, the design selects FPGA chip XC3S250E as the core controller. The CCD image sensor is used to get video signal. The CXD3142R is used to digitize video signal after the process of correlated double sampling. Based on the digitals data, FPGA receives digital image data in the format of YUV4 2:2 at the frequency of 19 MHz and then sends them to compression chip ZR36060 at the frequency of 27MHz through frequency conversion. When ZR36060 finishes the compression, FPGA reads the compression data from FIFO and sends data to W5300. At last, the controller starts sending order to complete the process of video data compression and network transmission. The PC will store, decode and display the real time image after receiving the video data.Hardware driver of image compression network terminal is completed on the platform of ISE 10.1. The lower computer makes use of hardware description language Verilog HDL to implement the initialization of compression chip and network chip, and then completes the function such as conveying after frequency changing, reading and network transmission. The developing of upper computer is based on the Lab VIEW platform which can realize UDP to obtain real-time image using graphical editing language.The experiment results show that the network terminal accomplished the image acquisition, processing, compression and transmission and the upper machine gets the real-time monitoring image. Through the actual observation test, images can achieve satisfactory video effect when the compression ratio is within 20:1.The design transmission rate is about 3Mb/s. It realizes the transmission of image data with less bandwidth, reaches the performance of digital image compression and network transmission. The image compression network terminal can take a long and stable operation.
Keywords/Search Tags:Image acquisition, Image compression, Network transmission, FPGA
PDF Full Text Request
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