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Design Of MASH Sigma-Delta Modulator

Posted on:2012-04-23Degree:MasterType:Thesis
Country:ChinaCandidate:G N SunFull Text:PDF
GTID:2218330362951228Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of science and technology, today's communication systems and a great number of applications have became increasingly demanding for high analog-digital conversion accuracy. Traditional Nyquist ADC has been difficult to meet the demand for accuracy, while Sigma-Delta ADC converter can guarantee speed when achieving high accuracy, so it gets a wide range of application. As the core of Sigma-Delta ADC, Sigma-Delta Modulator employs oversampling and noise shaping technology to effectively suppress the signal-band quantization noise, so as to improve the performance of the modulator. Therefore, Sigma-Delta modulators are widely used in audio circuits, medical imaging, monitoring of earthquakes and some other fields.The present study introduces the basic principles of the Sigma-Delta modulator, and specifically analyzes the effects of structure and parameters of the modulator on the modulator performance. Based on the theoretical guidance, a 4-order Sigma-Delta modulator is designed with the use of cascaded (MASH) structure. And a 2-2 cascade structure and the structure of the 2-1-1 cascade model of behavioral are designed in the Matlab Simulink software. Considering the effects of non-ideal factors, analyses of MOS switch nonlinear control,clock jitter,KT/C noise and mismatched components have been completed, and a system of non-ideal model has been built and used for simulation. Simulation results show that when the sampling rate is 128 and sampling frequency is 256kHz, the system's effective number of bits are all at 16bit or more. By analyses and comparison, the ultimately selection of the design of the system topology is the 2-2 cascade structure. Based on System-level, the design of the modulator corresponding interface circuits includes integrator,comparator,clock circuit,digital noise cancellation logic unit and other modules. Under the circumstances of Cadence software the whole circuit has been simulated in digital-analog hybrid way, which obtained the SNR is 100.3dB, effective number of bits is 16.49bit after Matlab calculating. The expected objectives of the project are thus achieved.
Keywords/Search Tags:Sigma-Delta Modulator, Cascade structure, Behavioral Model, interface circuit
PDF Full Text Request
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