| Sigma Delta Modulator is an oversampling technique commonly used in high resolution analog to digital conversion, and is very suitable for the implantation of A/D interfaces in modern standard CMOS technologies due to low sensitivity to their circuit imperfections, noise shaping behavior, simple realization. This type of A/D converters, with a low-resolution quantizer embedded in the feedback loop, uses oversampling to push quantization noise out of the signal band, and its digital filer converts the low-resolution signals into high-resolution ones.In this thesis, non-ideal behavior models of switched capacitor Sigma Delta ADC are presented. The modulator non-idealities such as Operational Amplifier parameters (GBW, colored noise, SR, saturation voltage and so on), clock jitter, capacitor mismatch, nonlinear switch on-resistance are included. The Operational Amplifier nonlinear DC Gain is modeled with emphasis and simulation results show it introduces odd harmonic distortion.Several 4th-order Sigma Delta Modulator are analyzed and modeled in Simulink. Their dynamic range character and circuit are compared and analyzed and the 2-2 cascade topology is a tradeoff choice for the circuit level design. The modulator circuit is designed in a UMC 0.35μm CMOS twin-well process with 3.3v power supply. Non-ideal behavior model and circuit simulation have demonstrated that the modulator is capable of achieving the design spec and the circuit simulation results shows that the non-ideal behavior model can estimate circuit performance precisely in a reasonable short time. The detailed design considerations in circuit and layout implementation of the chosen modulator are also discussed and analyzed. |
