Design Of RFID Reader Based On NIOS Ⅱ

RFID is an advanced automatic identification technology, which uses electronic tag reader and RF signal space between the coupling and transmission characteristics of two-way communication, to achieve untouched identification and information collection. The RFID technology in retail, logistics, manufacturing, transportation and military fields have a wide range of applications, profound impact on the future of human life. Derived by "IOT" concept was developed in Europe and America as the future control of the commanding heights of the new technology initiative.RFID reader is the core collection devices to realize the information items, and play a very important role in the whole RFID systems.In the current,many foreign and domestic manufacturers, research institutions have been readers for different band RF chip and baseband modules related to technology research and development carried out. RFID reader in accordance with its basic principle and structure, divided into radio frequency processing unit, baseband processing unit and control unit of the three components. RF processing unit for the reader and tag energy transfer between the high-frequency and data exchange unit used to implement the baseband and RF control unit reliable connection between the processing unit, data transmission fluid, including controlling unit interface, data encoding and decoding, anti-collision algorithm implementation and other digital signal processing, use of the system according to the user request to change the data transfer rate and communication interfaces, so developers improve the efficiency of the RFID reader to an important role in the performance of the system.The paper follows the RFID reader on the mainstream design principle, the use of modular design thinking, the use of integrated circuits and RF front-end FPGA devices supported by some of the baseband discrete devices to build hardware system throughout the reader. System software development process, using a reader base band unit and simulation of system-level design, hardware testing platform structures, FPGA-based embedded system software development with the technology route.