Based On The Fpga Design Of Wearable Processor

There are over ten key technologies in the realm of the wearable computer engineering, such as Microprocessor, Wireless adhoc network, System-on-Chip, Wireless communication, Embedded Operating System, all of these technologies are difficult technical problems in the computer engineering at present.In recent years, along with the quick development of micro-electronics technical, the integration degree of integrated circuit is more and more high, Microprocessor of the wearable computer can be designed on the FPGA platform. This thesis deeply discusses the design method of Microprocessor by FPGA. During the period of design this thesis's main research findings as follows:1.MIPS architecture was selected as the frame of Microprocessor. According to MIPS instruction set, the instruction set of Microprocessor was designed; 2. Five stages (IF, ID, EXE, MEM, WB) pipeline data path was designed with pipeline technique; 3. The difference function of the Microprocessor combined into a single Microprocessor. A typically procedures were run for simulation, The result shows that the Microprocessor is effective.