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Design And Implementation Of A Universal Memory Controller In The Fpga-based Systems

Posted on:2010-02-01Degree:MasterType:Thesis
Country:ChinaCandidate:L ZhongFull Text:PDF
GTID:2208360275991497Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
Along with the sharp development of Electronic Science and Computer Science, Large Scale Integrated Circuits is being applied more and more extensively among military affairs,consumer electronics and other areas of social lives.As an important player in the domain of Large Scale Integrated Circuits,memory device is the most popular one that merging into every single system.Various memory devices have different characteristics and require different control logic.Therefore,it would be a valuable academic research and applicable task to develop a general-purpose memory controller,which not only has the flexibility to control various memory interfaces,but also could fully utilize the bandwidth for different types of memory device to achieve preferable performance.This paper conducted a deeply research on the structure of general-purpose memory controller and the design flow and methodology of platform FPGA based SOPC system,which mainly including:the architecture and implementation of the traditional memory controllers;the internal architecture,addressing approach,data storage and timing control for various memory devices;Xilinx platform FPGA development flow and toolkits;SOPC technical superiority of flexible design, programmable,and can be easily trimmed and expanded.Based on all of above technologies,an innovative architecture of general-purpose memory controller was proposed,which is built in Xilinx platform FPGA Virtex-â…¡Pro.For pursuing the generic hardware and the configurability through software,BRAM based hardware and software interfacing protocol was introduced,which also consistent with the conception of Opcode and Instructions.In the end,the memory controller IP core was implemented with VHDL;a software tool Opcode Generator was achieved by C++ coding;the logical synthesis of whole SOPC solution and the functional validation of the general-purpose memory controller have also been accomplished.
Keywords/Search Tags:General-purpose memory controller, IP core, Platform FPGA, SOPC
PDF Full Text Request
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