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0.18um 100,000 FPGA Universal Programmable Interconnection Design And Testing

Posted on:2010-02-24Degree:MasterType:Thesis
Country:ChinaCandidate:H W ZhangFull Text:PDF
GTID:2208360275991332Subject:Materials Physics and Chemistry
Abstract/Summary:PDF Full Text Request
FPGA unique reconfigurable computing technology can not only reduce the development risk and cost of digital system, shorten the time to market, but also effectively lower the maintenance and upgrade costs by dynamic and remote online reconfiguration. Therefore, FPGA is widely used in communication, multimedia, industrial control, numerical computation and etc. Among the research and development of FPGA architecture, the design of programmable interconnection is the most important, because it costs approximately 80% of the chip area and 60% of the signal delay.In this thesis, we will focus on the architecture research of universal FPGA programmable interconnection. We have particularly investigated different interconnect solutions, designed and implemented a new universal architecture of FPGA programmable interconnection. According to the architecture and interconnect pattern of the different interconnection resources, we have proposed the optimized design solutions of hierarchical interconnection architecture, and achieved more design flexibilities and advantages. We further proposed the optimized solutions to the circuit design of the programmalble interconnections, and obtained the best tradeoff of the area and delay, as well as the predictability of the interconnect delay. Moreover, we have designed area-optimized dedicated interconnections, including CLB dedicated interconnection, block RAM dedicated interconnection and clock network dedicated interconnection.We have implemented the FPGA chip (named FPGA-2) based on the SMIC 0.18um Logic 1P6M Salicide 1.8V/3.3V technology and full-custom circuit design methodology. The chip includes 1200 programmable logic slices, 240 user I/Os, ten 4K bits block RAMs and 100,000 equivalent logic gates. According to the architecture of the FPGA programmable interconnection, we have performed hardware and software co-verification on programmable interconnections using the CAD design software. The test results show that the design functions of FPGA-2 programmable interconnection are thoroughly correct. The test with application circuits also shows that the functions of the whole chip are correct with high utilization of Sices and high frequency.
Keywords/Search Tags:Field-Programmable Gate Array, Universal Programmable Interconnection, I/O Interconnection, FPGA Test
PDF Full Text Request
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