Based On Sopc Part Self-reconfigurable Systems Research And Design

Reconfigurable computing system has been developed based on microprocessor and ASICs. It depends on the reconfigurable character of programmable logic device. Reconfigurable computing system can be programmed like microprocessor for higher flexibility, and can execute the task in hardware mode like ASIC for high performance, so it is a hotspot of current computer architecuture research field. Partial reconfiguration is a rising technology. When one module is being configured, others can still do their own job. It can realize time sharing of system resource. Compared with early reconfigurable computing technology, partial reconfiguration improves resource utilization and system's performance. With the development of semiconductor technology, current programmable logic device has been able to achieve a whole system in a single programmable logic device, which is so-called System on a Programmable Chip (SOPC). Self-reconfigurable system is a special kind of SOPC based embedded system. It constitute a system of hardware platforms by configuring a variety of reconfigurable logic function to the programmable device depending on the the reconfigurable character of programmable logic device. When the system is running, it can make use of the processor embedded in the reconfigurable logic devices to control the reconfiguring process. Thus the the traditional board-level reconfiguration approach is no more necessary. Self-reconfigurable system has more rapid and more flexible reconfigurability.Although current programmable logic device have provided plenty of supports for both partial reconfiguration and SOPC design, the existing design process of embedded system based on SOPC is not suitable for developing self-reconfigurable system directly. Aimed at this question, this dissertation has proposed a new design method which integrates traditional design process of SOPC based embedded system and EAPR based partial reconfiguration design process on the basis of the modular design methodology, mainly include: Firstly, the research status and research significance of reconfigurable computing are introduced, a variety of the current popular partial reconfiguration design methods are researched and compared. Integrate current design process of SOPC based embedded system and EAPR based partial reconfiguration design process to design a self-reconfigurable system. The research is focused on how to select and design proper IPs to meet the requirements of system design and how to drive the internal configuration access port of programmable logic device while the reconfiguration process is running. Finally, a partial self-reconfigurable FFT system has been implemented and tested on Xilinx Virtex-II Pro FPGA as an example. The detailed design and implement process has been introduced. Experimental results demonstrate the method is feasible and effective, and also reveal the reconfiguration time benefits of the self-reconfigurable system.