Based On The40Nm Process LVDS Design And Implementation

:LVDS (Low Voltage Differential Signaling) is a data transmission interface technology appeared in1990s, which solves the problems of ordinary I/O interface standard. LVDS delivers high data rates and noise rejection while consuming less power and cost comparing with other competing technology. Because of the benefits, the application of LVDS devises has become increasingly widespread.In this thesis, an800Mbps LVDS standard IP is presented. It achieves the electronic characteristics defined by industry standard ANSI/TIA/EIA-664A, and verified with the SMIC40nm CMOS process. LVDS is a differential signaling inter connect technology. LVDS signal which is changed from standard CMOS/TTL signals by a driver, is transmitted through the transmission media, then the receiver circuit changes the LVDS signal back to the CMOS signal. In this way, the signal data is transmitted in high speed, high performance and low power consumption.The innovation of this thesis is the usage of the level shift technology and the receiver input range expanding technology. In the40nm process, digital power supply is1.1V. Active amplifier and positive feedback latch circuits are used to solve the level shift problem to integrate LVDS model into SOC as IP. The rail-to-rail pre-amplifier and reusable hysteresis comparator based on positive feedback technologies are used to expand the common input range and improve common noise rejection of the low voltage differential signal. The main difficulty of the design lies in the performance improvements on the whole chip cost, power consumption, the signal transmission attenuation and skew and so on.The LVDS circuit designed in this thesis was taped out and verified. The chips were tested on static parameters, dynamic parameters. The static power consumption of the driver with a load is12.79mA. The static power consumption of the receiver without a load is4.23mA. The duty cycle at800Mbps data rate is more than45%, and the differential output is higher than250mV. All the results meet the design requirements.