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Real-time Multi-channel Digital Surveillance To Close The System Hardware And Digital Front-end

Posted on:2010-09-15Degree:MasterType:Thesis
Country:ChinaCandidate:N G DingFull Text:PDF
GTID:2208360275982902Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
The basic concept of Software Defined Radio (SDR) is to realize as many as wireless and personal communication functions with software based on a common hardware platform. SDR, which presents the trend of wireless communication in future, is widely researched in many countries around the world now.Besides the abilities of Wide band, high sensitivity, large dynamic range and environment adapted, the communication receiver also has to process large amount of signals and information in real time. Because of the limits of analog devices, the analog receiver may easily loss key parameters of signal, such as frequency, phase etc. The digital receiver can avoid above problems effectively. It can keep all characters of signals and realize the signal feature extraction, separation and recognition with digital signal processors. Therefore, research on digital receiver with high reliability, flexibility and anti-inference ability has become an important topic, based on which the digital panoramic receiver with wide bandwidth, high adaptability and interception probability will become the requirement during the development of electronic warfare.This dissertation starts from the idea of SDR, and a digital intermediate frequency receiver hardware platform based on FPGA is designed. Meanwhile, according to the project requirements, the interference software on the platform is complemented.The digital intermediate frequency receiver is mainly based on one piece of Xilinx Virtex-5 FPGA, whose abundant resource makes it impossible to the realize the desired functions through loading-on software which is described by the idea of SDR. There are totally 16 DDC channels, which are realized with four pieces of AD and four pieces of DDC ASIC named ISL5416. The signal channels become flexible in this way. The usage of ISL5416 has saved the resource of FPAG effectively, and makes FPGA to be more useable in baseband signal processing. There is a 32-bit PCI interference, through which the receiver can communicate with PC efficiently. All components are properly mounted on a 12 layers PCB board to guarantee normal working of each part, which is shaped by the PCI long card criterion. A digital receiver platform with powerful function and extending ability is thus built. Each functional mode on the designed digital receiver hardware platform is validated to work normally. They realize the sampling in median frequency and DDC, and the indices meet all the requirements.
Keywords/Search Tags:Digital Receiver, FPGA, DDC, PCI
PDF Full Text Request
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