Design And Implementation Of Digital Channelized Receiver Based On FPGA

In order to adapt to the increasingly complex battlefield electromagnetic environment,electronic warfare receiver needs the capability of large instantaneous bandwidth,real-time signal receiving,large dynamic range,high sensitivity,frequency resolution and overlapping signal processing ability in time domain.With the development of software radio technology and the improvement of digital signal processing device performance,the design of wideband digital channelized receiver with high comprehensiveness,stability and flexibility has great significance to modern electronic warfare.In this paper,the structure of high efficient digital channelized receiver based on ployphase filter with no mixed and no blind area is adopted,and the feasibility of the channelized structure is verified by simulation.On the basis of digital channelization,the measurement of signal pulse parameters is implemented and the design of digital channelized receiver is implemented on the hardware platform.The main work of this paper is as follows:(1)Design and implement a seven channels digital channelized receiver on the FPGA which can output IQ components,extract signal pulse,and implement the measurement of phase,frequency,pulse width,time of arrival and so on.(2)Complete the configuration of high-speed ADC,implement the synchronization and the serial to parallel conversion of ADC sampling data.Store ADC sampling data and IQ data with DDR3 and implement command interaction and data transmission between FPGA and DSP through interface of EMIF and RapidIO.(3)Extract signal pulse by amplitude dectection,adopt dynamic threshold as detection threshold to adapt different input signal-to-noise ratio,and further improve the success rate of detection by second detection.(4)Merge cross channel FM signal pulses and implement the detection of multiple signals by separating the pulses and PDW parameters of overlapped signals in time domin with parallel working state machine.Based on the hardware implementation,the system has the advantages of simple structure and real-time,and the reliability of the system is verified by hardware test.