With the high speed development of the electronic technology, the emergence of large-scale PLD and the development of EDA, how to improve the ultiliaztion of devices and use limited resourse to achive a large-scale logic design come to a hot of international academic study. Frogein scholars put forward the concept of dynamic reconfiguration and research it. Dynamic reconfiguration can be applied to a number of areas, which can be applied to DSO too.The paper expounds design and implement process of a 1Gsps sample rate acquire system. Based on the principle of dynamic configuration system, the design divide the data acquire system into many modules, which can optimize the design, reduce redundant circuit and improve system performance, after analyzing different state of DSO. The design implements system's dynamic-load through using dynamic reconfiguration.Finally, the paper gives the process of debugging about dynamic reconfiguration and the circuit of acquire system.Contents included:Reasearch the composition of the data acquire storage system of DSO based on dynamic reconfiguration.Set up the hardware platform of the data acquire storage system of DSO based on dynamic reconfigutation.Build SOPC in the FPGA. Implement the design of system's working clock circuit, the DSP interface circuit, acquire circuit, storage circuit and trigger circuit.Debug the entire data acquire storage system by the DSP.Dynamically reconfigure the FPGA by the DSP. |