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.0.6 Um The Bcd Process Optimization Of Ldmos Devices

Posted on:2009-11-10Degree:MasterType:Thesis
Country:ChinaCandidate:H YangFull Text:PDF
GTID:2208360272989597Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
During the passed several years, CMOS integrated circuit process has been dramatically developed in China. Comparing to foreign counterparts, the gap between them and us has been shortened. It is attributed to the demands of our huge internal market and the strong government support. However, the standard CMOS process is only suitable for the low voltage,low power and mass integrated circuits. For those applications with demands of high breakdown voltage and high power, BiCMOS and BCD processes are superior to the standard CMOS process.BiCMOS process consists of Bipolar and CMOS processes. The BCD process is a new process that comprises the DMOS and BiCMOS process. Both of them can exert not only merits of CMOS but also the merits of Bipolar and DMOS, but the process is more complicated than normal CMOS process. In this field a global company has already developed seventh to eighth generation of BCD process. The Chinese industry is still in a relatively primitive state in this arena.LDMOS is a kind of high power devices, which has lateral current channel and can endure high breakdown voltage and large currents. LDMOS is widely used as a power device in PIC and HVIC, because it has a lot of merits, such as high work frequency, high input impedance, current gain, voltage amplify and negative current and temperature coefficients. Its three electrode (source, gate, drain) are all on the wafer surface and easy to be integrated with low voltage circuits through inner connects. Usually we adopt field plate and resurf (reduce surface electric field) technology to improve LDMOS device performance, but the on-state resistance and breakdown voltage are always a tradeoff in process. Furthermore, similar to other MOS devices, it also faces device degradation by shrinking down the device size.In this thesis, author attempts to optimize LDMOS device structure and process based on the 0.6um BCD process of a BCD company with the aid of TCAD and the data of design rule check device in 0.6um BCD process.
Keywords/Search Tags:BCD, RESURF, Field plate, LDMOS, TCAD
PDF Full Text Request
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