Fpga Interconnect Structure And Layout Algorithms Research

Using FPGA is considered to be the fastest way to develop designs on semiconductor chips,because designers can repeatedly use FPGA for programming,verification and reprogramming.FPGA implements the same designs faster than ASIC with lower risk. The performance of circuits implemented in FPGA depends on FPGA architecture. The scale of FPGA is becoming bigger and bigger with the development of VLSI technology,which brings challenges to FPGA architecture design and FPGA software development.Complex problems always focus on FPGA place and route steps in order to improve circuit routability and delay.Therefore,it has been the main study direction to design more general software for FPGA architecture optimization.FPGA is composed of programmable logic elements,IO pads and some routing resource.Programmable wires,switch boxes and connection boxes are three main parts of FPGA routing resource.Making good use of FPGA architecture is most important in place and route software designs.According to island style FPGA architecture,this paper proposes a hierarchical versatile switch box model,covering arbitrary switch box architecture in FPGA.It improves greatly over the classic switch boxes.Based on this model,this paper designs new switch box architecture,JSB,and optimizes the distribution of wires to reduce circuit delay.Today,commercial FPGA products merge connection box and switch box together, getting better routing architecture.This paper proposes GRB from academic perspective,which includes switch box,connection box and fast connections.GRB greatly improves the performance,costing some chip area.In the study of practical FPGA,this paper designs placement software for FDP250K, a self-developed chip,supporting clock,bus and macro block placement.