.12-16 Bit Variable Input To The Design And Testing Of The Dac Chip

Sigma-Delta conversion technology is based on oversampling, noise shaping. There are many inherent advantages inΣ-Δbased digital to analog converters. The major advantage being that it is based predominantly on digital signal processing. Hence the cost of implementation is low and will continue to decrease. Also, due to its digital natureΣ-Δconverters can be integrated onto other digital devices. Manufacturing technology not with standing,Σ-Δtechnology offers system cost savings because the analog filter requirements are considerably less complexity. So, over the last few years sigma delta (Σ-Δ) analogue to digital converters (ADC) and digital to analogue converters (DAC) has becoming widely available, particularly for low frequency applications such as high fidelity audio, speech processing, metering applications and voice-band data telecommunications.In this paper, a complete digital front end for low frequency measurement applications is presented. The part can accept a serial digital word from 12 to 16 bits. The basic specification and general measurement are discussed. The mechanism of oversampling converters with Sigma-delta modulator is discussed. Using the half-band filter, 3 order CIC filter and sample and hold circuit to realize oversampling 64fs.Systematic design is carried out by MATLAB and presents the specific parameter indexes according to the characteristics , basic functions and the related requirements of the chip. It also integrated the interface module which can receive the S/PDIF signal.Then it is goes on with the design and realization of the digital circuits. In the end, the layout design is shown and it is also very suitable for SOC as an IP. After taped-out, the testing practical SNR is upto 67.54dB. The chip area is 0.05812 cm~2 by using CSMC 0.5 Micron CMOS Mix Signal HD - DPTM technology.