Key Technology Research On Single-loop 6th Order Sigma-delta ADC

With the rapid development of the information age,lightweight and compact smart electronic devices have become an indispensable part of modern life.The analog-to-digital converter(ADC)serves as a bridge between the real world and the information field,with the Sigma-Delta ADC widely used in the audio and sensor fields due to its high precision advantages.In this context,the author conducted a study on the circuit design of high-order Sigma-Delta modulators,and chose to use a more traditional single-loop six-order modulator structure compared to the MASH structure that has been widely used in recent years.Firstly,the core working principle of the Sigma-Delta ADC was analyzed,which includes oversampling technology and noise shaping.The dynamic performance indicators that the Sigma-Delta ADC focuses on were then introduced,and different structures of Sigma-Delta modulators were analyzed.In view of the research target of high-order modulator structures,the advantages and disadvantages of single-loop cascaded and multistage cascaded structures were compared.In order to solve the stability problem of the single-loop high-order modulator,multiple solutions were proposed:(1)using a CRFF structure and introducing a negative feedback loop;(2)satisfying the Lee criterion;(3)leaving enough design margin.The forward design of the single-loop six-order Sigma-Delta modulator circuit was carried out using MATLAB Simulink,suitable system parameters were selected,and the impact of non-ideal factors on circuit performance was analyzed.After verifying the behavior of the modulator circuit through behavioral simulation,the analog circuit of the modulator was designed using TSMC’s0.35 technology.In the design of the operational amplifier,a folded cascode structure was selected,and passive common-mode feedback circuits and passive forward summation circuits were used to reduce system power consumption.To reduce the delay time of the one-bit quantizer,a pre-amplification circuit and a positive feedback LATCH circuit were added to the comparator.The Sigma-Delta modulator designed in this thesis adopts a one-bit quantizer single-loop six-order CRFF structure.At a supply voltage of 5V and a sampling frequency of12.5MHz,the signal-to-noise and distortion ratio of the modulator is 113.15d B,and the effective number of bits is 17 bits.The overall circuit area is 1.55mm~2,and the total circuit power consumption is 91m W.