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Based On The Soc Memory Controller Ip Core Analysis And Design

Posted on:2009-06-14Degree:MasterType:Thesis
Country:ChinaCandidate:R LiFull Text:PDF
GTID:2208360245461616Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Memory controller is an important part of System Interface Unit which connect the Processor and the Memory device.With the development of processor technology,it is available to implement dual or even more core in a system,so the character and performance of the Memory Controller will have a big impact on the processor performance,and become one of the most important aspect which can improve system.At the other hand,facing the complex control logic and the strict timing request,to design high performace memory controller is a key problem for system design engineer.so it becomes a big challenge for design engineer to meet the above request.Base on the knowledge and the principle of memory technolog,analysis the implement and control logic of all kinds of memory device,Then according the SoC technology and IP core rules, describe the problem on the process of designing the memory controller IP core and the method which be used to solve.Finally, have a fully research on the design of IP core,including each module of the memory controller ,the waveform of the simulation and the result of the final analysis. The main results and novel idea of this paper are as follows:1.A good method to design the memory which can support all kinds of memory device are investigated in detail┄2.A fine memory controller Finate State Machine are studied in detail and the relative mechanisms are discussed.┄┄3.Design a memory controller IP core which can ben embedded in the project of SoC.
Keywords/Search Tags:IP core, SDR SDRAM, Memory controller, SoC
PDF Full Text Request
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