Serial Field Bus Protocol Design And Fpga Implementation

The technology of serial field bus is trend of numerical control system. In this field, there is a lack of the standard and the agreement of independent property right, this result in the enhancement of the domestic numerical control system have to rely on the overseas standard and the technology, it is obviously extremely bad to national corporations. This project is aims at exploration of the domain of the serial field bus which is the blank area in domestically. Although there is a lack of the experiences in this domain of the serial field bus, it is benefit to us for the understanding and the accumulation by the rewarding experiment in this field. The exploration of serial field bus is aim at the domestic numerical control system, the purpose of this project is achieve the improvement of communications mode which transform the analog communications to the digital communications, this enhances the openness and the versatility for domestic numerical control system.The serial communication protocol which talked in this article is used as the communication between the rock-bottom facilities (such as the servo drivers and IO modules) and the controller of the numerical control system. In the period of running of the numerical control system, the control system send the control data to each rock-bottom facilities, at the same time, the rock-bottom parameters was feedback to the controller by the rock-bottom facilities. The period of refreshing the control data is in the rank of millisecond, and the synchronous error among the rock-bottom facilities within the microsecond. For this situation, the characteristics of the serial field bus of the project are highly real-time, highly dependability and a little synchronous error.This article will introduce the details of the design of a serial field bus. To realize a design of serial field bus, firstly it is necessary to constitute the standard and the protocol of the serial field bus, this protocol is not only fit in with the system of our corporation, but also compatible with the other system in this domain, this will fit in with the application in practice; Secondly choose a right flat to realize the protocol, we use FPGA (Field Programmable Gates Array) as the flat of exploitation. All the modules except the application layer will be complete in the FPGA. There are structure and principle of protocol in this article. There are detailed descriptions of the idiographic modules in this paper. There are also information of functional simulation and test of modules. All the source code and testbench of the designed modules are exploited by the Verilog language, in this way the designed modules is transplantable, it is compatible with all kinds of devices.