Fpga-based Multi-mode Video Real-time Acquisition System Design And Implementation

As one of the video coding standard of the next generation, H.264/AVC is developed jointly by ICU and ISO. It is called as the new generation video coding standard due to its excellent performance compared to the former standards. Research H.264 video codec technology is becoming one of the world's hot spots. The video acquisition and coding system based on H.264 is composed of the video acquisition part and the video compression part. The two parts work closely together, thus enhance the performance of the entire digital video compression system. The video acquisition part has an important influence to the processing performance of the system. The real-time video acquisition system for the H.264 video encoder has been designed and completed in this dissertation.The video acquisition system is made up of video ADC(Analog to Digital Converter) module,video acquisition and control module,video storage module and mode reception module. It digitalizes the analog video signal classified as PAL television system and preprocesses the digital video data before storing them accustomed to multiple modes. Additionally, the system can provide video data to video compression system with appropriate format efficiently when needed.The job of this dissertation includes construction of hardware platform and design of relevant logic. The system hardware frame is composed of two parts: the first part is the STRATIX EP1S25 development board, which is the main hardware platform; the second part is the daughter-board implementing the tasks of video ADC (Analog to Digital Converter) and high capacity storage. The system FPGA logic design is optimized on the format of the data storage and requirement of data throughput based on the requirements of video processing algorithms and the characteristic of SDRAM, which greatly enhances the visiting speed to the SDRAM. It can apply to the digital video processing system with large capacity and high data throughput. By analyzing the data processing flow and control flow of the video acquisition system, the logic function of the design mainly includes mode reception and change detection unit,I2C bus controller,ITU-R BT656 format video decoding,video data preprocessing,storage control mechanism and the following encoding system interfacing unit. All the digital logic of the video acquisition system is implemented in PLDs (CPLD and FPGA), which boosts the reliability of the system and increase the flexibility in debug.The system is developed under the platform of Quartus II 5.0 and Modelsim software,and the circuit board is drawn by Protel DXP tool. Through analysis,design,experiment and debug, the video acquisition system works properly.