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Ic Ultra Deep Submicron Interconnect Effects And Physical Design

Posted on:2006-08-24Degree:MasterType:Thesis
Country:ChinaCandidate:Z H XueFull Text:PDF
GTID:2208360155966449Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
As the integrated circuits (IC) are scaled into very deep submicrometer (VDSM) dimensions, chip operates much faster and more powerful with lower power and cost. However, crosstalk, antenna and IR drop become the bottle-neck of the physical design, which restrain the development of IC. New CAD tools, methods and design flow become more and more important for the success of design.Based on the technological requirement of VDSM physical design and optimization, supported by new CAD tools, methods and design flow, this topic aimed to explore and research the SI (single integrate) and the hot problems in physical design under VDSM technology.First, focused on the development of modem physical design and based on the key technique of VDSM interconnect characteristics, SI and so on, the author has a systematic and deep research on the VDSM physical design and the cooling scheme of the interconnect effects, which affect the SI.Second, based on the first point, the author has a deep research on hot problems in physical design flow such as high powerful clock routing, floorplan, place and route, power plan and optimization, parastic extraction and so on.Based on the above results, the author has established proper design and optimization flow and completed the physical design of a 32 bits RISC CPU by the VDSM CAD tools of Synopsys. This design adopted the mode of congest-driven and timing-driver and effectively meet the requirement of routing and timing. Besides, the design also adopted the optimization means such as in-placement optimization, routing optimization, search and refine, search and repair, DFM optimization and so on and greatly improved the quality of design.As for the SI which is the main problem for VDSM physical design, the design offers a correspondent restraint to crosstalk and antenna while improving power plan. During the design, the author has successfully restrained the crosstalk in post-placement optimization and routing, has had detailed analysis for crosstalk after (?)cating and has completed the repair for remained violations. Besides, by setting theantenna rule and fixing antenna violations by breaking the antenna with a higher-layer metal, the author has deleted the antenna effect and avoided the high cost from top-layer metal to lower-layer metals.The deep research on VDSM SI and the physical design flow has a creative significance on modern VLSI IC physical design and optimization.
Keywords/Search Tags:IC(integrated circuits), VDSM(very deep submicrometer), Physical design, SI (single integrate), place and route
PDF Full Text Request
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