Secondary Surveillance radar (SSR) is a key equipment in Air Traffic Control (ATC) and military Identification Friend or Foe (IFF).Since very high reliability and stability is required in these two areas, SSR is a hot issue in Radar signal processing. The traditional SSR responders carried by airplanes are mostly composed of middle or small scaled integrated circuits, which have poor performance in their stability and reliability. In allusion to these defects, this thesis provides a new kind of hardware structure which is based on FPGA and DSP. This hardware structure has high performance, such as high reliability, easily being integrated, suitable for modular design, fast processing, capable of real-time processing many replies etc. A algorithm of reply signals processing including dephantom, defruit, code extraction and confidence analyzing is given in this article as well as the sofeware design based on DSP is introduced. The algorithms have been applied in the plot extractor of Molopulse Secondary Surveillance Radar and It's high performance has been approved by repeating testing. |