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Cmos-compatible Process Design

Posted on:2005-04-06Degree:MasterType:Thesis
Country:ChinaCandidate:M Z WangFull Text:PDF
GTID:2208360125964338Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Smart power integrated circuits (SPICs), which will lead to the second electronic technology revolution, are used more and more widely. The application fields include switching power supply, electronic ballast, motor drive, mobile electronic, display drive, etc. In this paper, the SPIC designed is specially applied to the electronic ballast.Firstly, the research and development on SPICs are reviewed briefly, from which we get the aim of this design that the power integrated circuit should comprise not only power devices, but also logic-controlled devices in the same substrate.Second, the evolution of semiconductor manufacture processes including their essential features and process flows, especially of the three representative processes, namely standard bipolar process, polysilicon-gate CMOS process and analog BiCMOS process is looked back. And then, according to the U.S. Patent 5,726,469 and U.S. Patent 6,310,365 B1 of Prof. Chen, a process named B13 for this SPIC is designed, which is based on 2um polysilicon-gate CMOS. With the help of software tsuprem4 and matlab, the process feasibility is verified, and the parameters for device simulation are extracted.At last, the layout design rules include DRC, ERC, EXT and LVS base on B13 are customized.
Keywords/Search Tags:SPIC, Process, DRC
PDF Full Text Request
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