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Based On The Fpga's Underwater Remote Control Decoding Circuit Design And Research,

Posted on:2005-02-10Degree:MasterType:Thesis
Country:ChinaCandidate:L Q ChenFull Text:PDF
GTID:2208360122481571Subject:Communication and Information System
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As technical development in computer and integrated circuit,the chip design based on the technique of EDA is becoming the mainstream of that the electronic system is designed. Field programmable gate array(FPGA) as a kind of programmable ASIC has been extensively used in many fields,such as computer, communications, Aero-Space,etc. In general, FPGA is mostly used in high-speed communications systems or high-speed signal processing systems because of its high-speedly and parallel architecture.However,in this thesis,it was applied to a low-speed and low power consumption system-a underwater long-range remote control reception system to realize decoding of remote control instructions in the frequency domain,and made the satisfactory result.There are several aspects of work that was done in this thesis mainly.Firstly ,the theory of the under-water long-range remote control system was analyzed and the remote control instruction code was designed.Secondly,decoding circuit of the under-water long-range remote control system was designed with FPGA,including VHDL coding,simulation, synthesis,Place&Route,etc. Besides,power consumption to FPGA that is designed is estimated in this thesis.Lastly, We designed and made one PCB to verify and test FPGA decoding chip that is designed,and debugged and tested it finally.Experiment testing result indicates,the project of realizing decoding of remote control instructions in the frequency domain with FPGA is feasible.It can narrow the systematic volume, raise systematic dependability effectively, accomplish lower power consumption, and can also support in-system configuration and programming with the result that debugging, upgrading and maintaining circuit is more flexible and more convenient.
Keywords/Search Tags:Long-rang remote control, Field programmable gate array(FPGA), Decoding, Fast Fourier Transform (FFT), Power consumption, Hardware description language(HDL), State machine, JTAG
PDF Full Text Request
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