Font Size: a A A

Research And Implemention Of Physical Layer Downlink Control Link In LTE System Based On FPGA

Posted on:2017-03-25Degree:MasterType:Thesis
Country:ChinaCandidate:D Q PengFull Text:PDF
GTID:2428330482480979Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Nowdays,mobile communication technology is developing rapidly,with the strong promotion of the communication operators and manufacturers.As a leader in next generation technology,LTE is highly anticipated since its introduction.In recent years,the performance of LTE has been further improved,with the constant introduction of new technology,such as enhanced MIMO,Carrier Aggregation,CoMP,Radio Relay and so on.As an important part of the LTE system,the downlink control channel provides entire system with significant channel control messages.With the continuous introduction of protocol standards and the continuous introduction of new technologies,the control signals are greatly increased,and the traditional technology of downlink control channel has been unable to meet the requirements of the latest technology applications.Therefore,the research of the control channel can not only verify the rationality of the relevant protocol standards,but also greatly promote the commercial process LTE-A related products.The research of LTE system is acted as a starting point,this paper mainly introduces the system architecture of LTE,wireless interface protocol and frame structure,and introduces the three-layer model of LTE protocol stack and the key technology of LTE-A,and then it makes a detailed presentation for the the downlink control channel,describes its key technologies,like CRC,Convolution Coding,Rate-Matching,MIMO and OFDM.Then,it gives the FPGA implementation scheme of the physical layer downlink control channel on the basis of the above.As a glittering core of this paper,This part introduces the whole process of the bit level processing and symbol-level processing in the downlink control channel with the use of FPGA,and explains the realizion of 1536 points FFT with Supporting the block floating point computing.At last,it tests each sub module of the scheme with the use of the simulation platform,and analysis the results of the simulation test.what's more,a debugging on the boards is also been made to verify the correctness of the design,and determine the basic design products to meet business needs.
Keywords/Search Tags:LTE (Long Term Evolution) syestem, MIMO (Multiple-Input Multiple-Output), PDCCH, FPGA(Field Programmable Gate Array), FFT(Fast Fourier Transform)
PDF Full Text Request
Related items