Research On Three - Dimensional Vertical Structure Impedance Memory Architecture And Circuit

As the amount of data needs to be processed by integrated circuits increases, the storing of data becomes very important and the market demand for discrete high density memory also increases. The present mature dicrete high density memory is NAND Flash, but NAND Flash can’t shrink well as the technology’s continuous development. Therefore a new type of high density memory is needed to meet the demand of high capacity storage.RRAM’s storage medium is usually made of metal oxides under simple production process, providing itslef a shirinking advantage. This makes RRAM a research hotspot of industry experts. In order to compete with3D NAND Flash’s high density,3D Vertical RRAM is proposed, but3D Vertical RRAM still has many problems to be solved:Determination of high density architecture, IR Drop, Disturbance, long strobe delay of large array, power etc.This paper gives a detailed analysis of these problems, and puts forward the corresponding solutions. Promoted low IR Drop3D Shunting Vertical RRAM framework, using parallel operating mode of to compete with NAND Flash’s high operating bandwidth. Used Ref-Cell-Read and Set/Reset-Verify scheme to further inhibite IR Drop’s effects on read and set/reset reliability. Promoted2D1R and Tick-tuck scheme to solve the Disturbance and long strobe delay problem. At the end, the power issue was analyzed, and the requests for some technology parameters were put forward.