Biopotential Read Circuit For Portable Health Care Systems, Research And Design

Portable healthcare system has been hotspot in the area of Integrated Circuits (IC) design for some years, and bio-potential signal plays an important role in modern clinical practice. This thesis aims to the research and design of bio-potential readout circuits, hence get ready for the design of portable healthcare systems.There are two key modules in the bio-potential readout circuits, the Analog Front End (AFE) and Analog-to-Digital Converter (ADC), which are both analyzed and designed in this thesis. Low-noise and low-power strategies are emphasized all through the thesis. As regard to the AFE, the AC coupling structure is adopted, which can cancele the electrode offset voltage effectively but no additional noise and power are introduced. As a key circuit module in the AFE, the MOS-Bipolar pseudo resistor is studied intensively. The successive approximation register (SAR) structure which is best suited to low power applications is adopted in another key module, A/D converter, was adopted. The three main blocks including DAC, comparator and SAR logic are studied one by one. The performance deterioration caused by capacitor mismatch and parasitic capacitors of DAC is analyzed in detail. What's more, a low kick back noise, low offset voltage CMOS latch is proposed, which can ease the design of preamplifiers, hence a large amount of power saving is achieved.The readout circuits is designed under 0.18μm 1P6M CMOS process, and the AFE and ADC are realized on two different chips. The AFE is still under manufacture, the simulation result shows that the AFE exhibits a band pass frequency response characteristic. The cut off frequency are 0.35Hz and 155Hz at low and high end, respectively, and the mid band gain is 46.5dB. The AFE works under 1.8V supply, dissipating 1μW power, and exhibits 2μVrms input referred noise, hence the Noise Efficiency Figure (NEF) is 2.6.The ADC has been manufactured and verified, the measurement result shows that the DNL is-1/1.5LSB, INL is-2.5/2.5LSB, SFDR is 78.7dB, SNDR is 61.8dB. The chip works under 1.8V analog supply and 1V digital supply, and dissipated 455nW power, corresponding to a Figure of Merit (FOM) of 220fJ/Converstion-Step.