Key Technologies Research On Ultra-low-power Analog Front-end Circuits For Bio-medical Equipment

Wireless body area network(WBAN)provides remote health monitoring of a patient's state for a long periods without any restriction on the person's normal activities.It allows bio-signal monitoring to be done daily,rather than limiting it to the clinical environment.This drives the integration of the mixed signal detection system with a fully optimized low-power low-noise analog front-end circuit for long-term,portable or wearable applications.The front-end circuit is the most important block in a wearable device,which determines the noise performance and signal quality of the whole wireless biosensor system.Due to the low frequency and weak amplitude of bio-potential signals,the front-end circuit should have low power consumption,low noise,high CMRR and very-high input impedance.In addition,various interferences introduced by biological electrode,human motion and 50/60Hz power line will seriously affect the quality of bio-potential signals,which will bring great challenges to high-performance signal acquisition and processing front-end circuits.This thesis focuses on the key technologies of designing a low power and low noise analog front-end circuit,and puts forward several interference cancellation technologies,which break the bottleneck of designing a high performance,small size and long life wearable front-end circuit.Moreover,several effective solutions had been proposed to acquire high quality bio-potential signals.This thesis firstly describes the characteristics of bio-potential signals and introduces the biological electrodes.Later,we expound the circuit acquisition scheme and key technical problems to achieve the bio-potential signals,and then deduce the design requirements of the analog front-end circuits.The noise optimization method had been studied both on circuit system level and transistor level,and the subthreshold CMOS circuit design technologies are presented.The mechanism and elimination methods of bio-potential signal interferences are illustrated,and several interferences,such as electrode DC offset,50/60Hz power line interference and motion artifact had been well eliminated.This thesis presents a 0.5V low voltage,low power analog front-end circuit,which can be configured to achieve several bio-potential signals,such as ECG,EMG,EEG,LPF and so on.In order to make the circuit suitable for use in WBAN,this thesis proposes a new low-power front-end circuit architecture,which integrates a capacitive coupled chopper amplifier,a switched capacitor filter and a fully dynamic 10-bit SAR ADC.The chopper modulation technology is used to eliminate the 1/f noise and input offset voltage,and a DC-Servo circuit and a RRL circuit are added to eliminate the electrode DC offset and amplifier output ripple.The gain and bandwidth of the front-end circuit can be programmed to achieve various bio-potential signals,and thus simplifies the circuit complexity and reduces the power consumption.In addition,the front-end circuit combines both continuous time and discrete time signal processing scheme by adjusting the clock phase to further optimize the circuit structure and the reduce power consumption.This bio-signal monitoring front-end IC has been fabricated using SMIC 0.18?m standard CMOS process.The test results show that the power consumption of the front-end circuit is only 1.3?W,the input impedance is 48.5M?,the CMRR is 98dB,PSRR is 73dB,and it achieves 8.35-bit ENOB.The circuit performance can meet the design requirements of the circuit very well.This thesis also presents a low power and high input impedance DC-AC configurable CMOS front-end IC for wearable ECG monitoring.This IC mainly includes three parts,namely,high input impedance DC-coupled instrumentation amplifier(IA),AC-coupled programmable gain amplifier(PGA),low power single-opamp CT??modulator.In addition,on-chip power management and clock generator were implemented to minimize the device size of the ECG monitoring system.This IC can be configured to DC-coupled topology to achieve ultra-high input impedance for dry electrode,and AC-coupled topology to achieve better electrode DC offset suppression for wet electrode.A baseline wander tracking technique is proposed to eliminate baseline disturbance,and a right-leg driven circuit is realized to enhance the CMRR and minimize the 50/60Hz power line interference.Fabricated in SMIC 0.18?m CMOS process,this front-end IC occupies0.24mm~2 active area and consumes 64.8?W from a 1.8V supply.It achieves 54.7dB SNR,58.2dB SFDR,8.54-bit ENOB,input impedance higher than 2.2G?and DC suppression as large as�300mV.