The Behavioral Level Design And Mixed-signal Simulation Of Analog And Mixed-signal Integrated Circuits

With the development of the semiconductor industry, the design and manufacture of IC has been converted into ASIC and SoC(System on a Chip), and the digital SoC has been converted into mixed-signal SoC.Many new challenges in mixed-signal SoC leads to new design technologies and tools.With mixed-signal designs becoming more complex and pressure increasing to get the designs right on the first try, designers are finding that the traditional bottom-up and resent top-down design style are no longer adequate. The new top-down design process implements multiple passes with each step being verified with mixed simulation. Mixed-signal hardware description languages are used to obtain a shared design representation. The system engineers can build an architectural-level description of the design constructed from behavioral models of each of the blocks that can be evaluated by each of the circuit designers.The analog circuit is the bottleneck for mixed-signal circuits, so the research on behavioral models of analog circuits is the pivot of this thesis. Based on the research and the analysis of the voltage mode buck DC-DC converter, behavioral models are built with mixed-signal hardware description languages, Verilog-AMS.Simulations are performed to verify the proposed models.Behavioral models ease the stability analysis of the closed system and the design of the compensation filter.In order to implement the mixed-signal simulation, the thesis introduces the flow of the mixed-signal verification and the simulation tools. Then the comparison and analysis of the simulation results of behavioral and transistor level models validate high efficiency of mixed simulation which includes analog and digital mixed simulation, and different description level mixed simulation.