Soc Test Development With Highest Yield

Marching into SoC era of integrated circuits development, the most difficult challenges are testability and test yield. How to develop the highest yield test program efficiently becomes the most concern of the testing industry.This thesis is focusing on SOC test program design and implement, the goal is to develop highly integrated topmost performance DVD recorder SOC test program with higher yield. Base on hardware and software test conditions, this thesis has thoroughly studied the yield improvement and debug technology.This thesis investigates key points of yield improvements, put forward the solution of the problem as well as employed new debug technique to debug corner chips to optimize test program yield. Meanwhile, regarding to certain yield killing points, it compared current techniques and new methods and further optimized test program, proved the new methods can improve production yield to achieve expected yield, contributed to company sales team due to cost reduction.