The Design And Implementation Of A 12 Bits 100ksps SAR ADC Based On 0.35um Mixed-signal CMOS Technology

Successive approximation register analog-to-digital converter which is marked SAR ADC in brief is a common architecture for middle to high accuracy applications which require the sampling rate less than 5Msps. In general, the accuracy of SAR ADC is 8-12bit, and it has the characteristics of low power and small area, etc. SAR ADC is widely used in many application fields, such as portable instruments, battery, input quantization,industrial control and signal sensing,etc.A 100ksps, 12bit ADC with adjustable input-voltage range was designed and realized in 0.35um mixed-signal CMOS technology in this paper. The main contents of the research work are listed as following:1. The world-wide development of ADC at present is summarized,the principle and critical parameter for various commom structure of ADC are analyzed2. A structure of RC-mixed SAR ADC is improved.In this structure,weighted sum is implemented by a resistor string and a capacitor array,which can greatly reduced the chip size.3. Various programmable circuits are desiged,which makes the function of ADC is relatively complete and enables the ADC can be used for many applications. Programmable circuits contain the selection of input-signal,the choices of SAR'frequence,and the control of gain,etc.4. The circuit of bandgap reference with high accuracy is designed and implemented.This bandgap supplies a voltage of 2.4v,the temperature coefficient of this bandgap is 9.4ppm/℃,the Power Supply Rejection Rate is -61dB at 1kHz.5. The layout of the total ADC is drawn in the 0.35μm Mixed-CMOS technology .The results obtained by post-layout simulation indicate that the differential nonlinearity is±1LSB,the integral nonlinearity is±1LSB, and offset error is±4LSB in the conners of SS,TT,and FF.The total static power dissipation for all circuits is about 3mw,The total area of layout for ADC is about 0.3875mm~2...