Design Of A 8-Bit High Speed And Low Power ADC

With the rapid development of semiconductor technology, integrated circuits has stepped into a new era of SOC. High-speed, low-power A/D converters are widely used as analog IP, especially in SOCs for communication and video processing. In this paper, we proposed a 8-Bit 100MHz low-power two-step A/D converter based on 0.35μm 5V BiCMOS process.Considering the tradeoff between high-speed and low-power, two-step architecture was adopted. The A/D conversion is completed in two steps :The two-stage ECL circuit and analog subtrator are adopted for the conversion of high 5 bits of ADC, a 3-bit Flash ADC is adopted for the conversion of the low 3 bits. In order to improve the speed of whole ADC and largely reduce the numbers of comparators, a type of high speed voltage comparator is designed. Because of Gray code is used in the coding of the conversion of low 3 bits, a Gray-to-binary circuit is added before the output of the converted data. We also design a bandgap voltage reference circuit to provide precise voltage reference for the referred ADC.All modules in the ADC are stimulated individually and the ADC is stimulated at a system level. The main performance parameters of the ADC are: 8-bit resolution, maximum 100-Msample/s sample rate, power dissipation of 400mW. This design can be widely used in the are of data communication ,video-processing and medical imaging.