Design Of Video Acquisition System Based On NiosⅡ

With the rapid development of computer, networking and communication technologies, digital image and video have been widely used in security surveillance, industrial inspection, consumer electronics and intelligent transportation fields. And how to realize the high-speed data acquisition of digital image is a key technology of digital image processing. This paper has designed a video acquisition system based on the Nios II soft-core processor. The system centering on Nios II embedded processor and combining rich IP cores realized the video collection and displaying functions in a single FPGA chip.Firstly, the paper analyzes and compares the existing programs and then puts forward my own design. Mainly expounding the framework and realization principle of the video acquisition system, and introducing each part of system and selecting related chips in accordance with system design requirements.Then, the design of CMOS controller and LCD controller is discussed in detail.CMOS controller controls camera to collect and process image, and then send data to SDRAM. For this part, firstly using Verilog language to simulate the I2C bus timing to realize camera initialization, and then control camera to collect image data. And then processing color space transformation for the subsequent LCD display. Meanwhile, the converted images are processed by median filtering in order to improve the quality of images. Finally, Avalon interfaces are added for CMOS controller to complete IP core packaging.The LCD controller is to driver LCD display collected image. For this module, mainly complete timing control module, DMA controller reads data from SDRAM and stored in FIFO, and then timing control module read the data from FIFO to show in LCD screen. After each module is designed, all IP cores needed are configured to get top-level circuit under the environment of SOPC Builder.Then, the system software design and debug are completed in Nios II IDE environment using C language, mainly includes driver development and application development. The drivers directly connect with the hardware macro definition, and NiosⅡoperates controllers through the drivers. For applications, this paper adopts the synchronization design to avoid clash when CMOS and LCD interface visit SDRAM at the same time. The LCD interface has the priority to transmit, the DMA of CMOS transmit can begin only when the DMA of LCD ends transition.Finally, summarizing the whole dissertation and putting forward some places which need to be improved and perfected.