Research And Design Of High Speed Low Power Digital Calibrated Pipeline ADC

There are many kinds of ADC, whose performance (speed, accurate, power consumption) is determined by their architecture. So, they are always used in different fields. Pipeline ADC has some metrics such as high speed, moderate resolution, and smaller power consumption and so on. Pipeline ADC is widely used in video communication with resolution from 8 to 14, and speed from MHz to million MHz.Recently, digital calibration algorithm is used to improve ADC performance. Because of the scaling of dimensions of CMOS processing, digital circuits lead to lower power consumption and much smaller area compared to analog circuits.In this project a high speed, high resolution, low power consumption is designed. To achieve this, a pre-sampling OP AMP is used. The unit gain bandwidth of OP AMP is designed small, according to normal one. The error generated by pre-sample is transformed to gain error. With background digital calibration algorithm, gain error can be easily eliminated.Chapter two gives a simple instruction of Pipeline ADC.Chapter three gives the sources of different errors separately in detail. These error sources including finite DC gain error, finite unit gain bandwidth, settling error, capacitor mismatch and clock jitter. All the above errors are linear. In the end of chapter three, a summary of 1.5bits/stage analysis is presented. According to the analysis, all of the errors above can be treated as equivalent gain error and equivalent offset error.Chapter four reviews the history of digital calibration, and different kinds of implementations.Chapter five presents a fast-convergence digital calibration. In this method, dither error is added to the signal. Signal and intrinsic errors are modulated by the dither error. Dither error is relevant to itself, but no relevant to the input signal. So, errors can be separated from the signal. In the digital domain, the equivalent error is subtracted by the normal output. Different error has different calibration method. Using simulink to do a behavior simulation. According to the simulation results, the proposed fast-convergence calibration method is 1000 times faster than using LMS algorithm.Chapter six gives the circuit level implementation of Pipeline ADC. In this project, the ADC has a enable control, which can turn off the chip when no signal comes in. Also, a internal reference is integrated. There is a low voltage protection circuit, which can shut down the chip when the supply drops too low.Chapter seven gives a summary of the thesis.In this thesis, the calibration method is only verified by simulation(simulink), according to the finite studying time. In the past time, the analog block has already been finished. The next step is to finish the design of digital block in transistor level.