The Research Of 16QAM Modulation/Demodulation Systems Based On FPGA

As the two traditional methods of digital modulation, frequency modulation and phase modulation, have some defects, such as low spectrum utilization rate, poor resistance to multi-path fading, slow power spectrum decaying, serious out-of-band radiation. Quadrature amplitude modulation is a joint-controlled digital modulation technology of phase and amplitude, which not only has higher spectrum efficiency, but also has higher speed of data transmission in limited frequency band. QAM modulation technology plays an important role in modern communication. So that there is important theoretical and practical significance in deeply researching in QAM.FPGA has become one of the preferred way in wireless communication hardware design, because of its powerful, short development cycle, repeatability of modification, intelligent development tools and software upgrade easily features.This thesis combines the soft wireless radio thought, and builds the 16QAM systems based on FPGA of which the bandwidth is 1350Hz, the carrier frequency is 1MHz, and the code speed is 4000Baud. The modulator has achieved the intended design requirements through debugging and testing. Some of the key modules' algorithm of the demodulation, such as carrier synchronization, symbol synchronization has been simulated and analyzed. Also, these modules have been compiled by verilog language in ISE 9.2 development environment. The Modelsim simulation verifies that the relevant modules'design correctly, the function of carrier synchronization and symbol synchronization can be achieved.Loop filter, as the key part of symbol synchronization and carrier recovery modules, has a crucial influence on performance of demodulation systems, in this thesis, there has detail introduction about digital loop filter. Considering performance requirement, extent of difficulty and hardware resource consumption of system itself design, this paper selects appropriate measure to implement it. The thesis also gives brief description of hardware development platform and chip used in system design. Finally, it presents the FPGA design-flow one by one.