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The Simulation And Verification Of Timing Model Based On I/O Circuits

Posted on:2011-11-02Degree:MasterType:Thesis
Country:ChinaCandidate:K Y YongFull Text:PDF
GTID:2178360302991601Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Timing Model is a sort of verification of CMOS circuits, and it is a critical part of IP characterization. Timing Model refers important and correct data for customers who will use the IP. Not only keep the secret, Timing Model also provides detail information of circuits to customers.This project of paper comes from an independent research product of SMIC. The paper introduces a kind of simulation and verification based on a 90nm Standard I/O with low leakage current. The paper first studies how to test the delay-time and transition-time, and how to verify the data. As the same time, the paper studies the problems and the solution may encounter in the simulation. Next, the article describes how to simulate static power dissipation and dynamic power dissipation, and how to determine the correctness of the simulation data. Paper in the final studies how to use the Timing Model to set up and generate Library file, and how to extract and verify the library data. In additional, the paper gives a brief introduction to the NCX software usage.The simulation and verification of Timing Model is the key point of this paper.
Keywords/Search Tags:Timing Model, Standard I/O, Delay-time, Transition-time, Static-power, Dynamic-power, Library
PDF Full Text Request
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