Research And Design Implementation Of FPGA Configration Program In Embedded System

With the emergence of submicron technology, FPGA chips have developed rapidly, thus making the SOPC(system on a programmable chip) design the mainstream technique in embedded system design field. As the FPGA's configuration memory arrays are volatile, FPGA has to be reconfigurated every time after power-on. Therefore, FPGA configration plays a crucial part in the FPGA's development and application. With the development of boundary-scan technology, boundary scan interface in FPGA configuration application has got more attention.An in-system configration program of programmable logic devices based on boundary scan interface is presented in this paper. The paper begins with a detailed study of IEEE Standard Test Access Port and Boundary-Scan Architecture(IEEE₁149.1) and IEEE Standard for In-System Configuration of Programmable Devices(IEEE₁532). Based on the research on Serial Vector Format (SVF) file, a more suitable RSVF file format for device configration has been put forward. Finally the configuration program is modeled and simulated using Verilog HDL language, thus achieving all mandatory commands and most of optional commands in the standard specification and the device configuration function, which has also been verified successfully by FPGA. As a result of the master controller, the configuration operation has the advantage of high degree of automation, flexible and efficient usage, low production cost. Accompanying with the controller RSVF file takes up less storage space, and its operation is more convenient and reasonable. It will have a great potential in the application of FPGA in embedded system.