Font Size: a A A

Design Research For DSP Embedded Debugger Module Based On IEEE1149.1

Posted on:2009-07-24Degree:MasterType:Thesis
Country:ChinaCandidate:L ZhouFull Text:PDF
GTID:2178360242977482Subject:Software engineering
Abstract/Summary:PDF Full Text Request
DSP design and manufacture technology has to face a lot of challenges, of which the embedded DSP platform debug problem is a key.Through 20 years'development, design for debug had become one part of chip design. It had been divided to different types according to the practical use, including software-based, debugging using device test features, in-circuit emulation and on-chip emulation-based debug support. As the technology of IC design and manufacture is developing very fast, to pursue faster speed or lower power consumption, the clock frequency has been rising, number of devices has been increasing, architecture has become more complicated, and the development of SOC and multi-cores technology has been booming. All these things bring great challenges and opportunities to design for debug.Tulip is a national key research project which is taken by my college. Its goal is to design and implement a low-cost 16-bit fixed point DSP. Tulip DSP has a Modified Harvard architecture with multiple buses. In this paper, combined with the project experience, different methodologies are compared and on-chip emulation-based debug support has been chosen as the Tulip DSP Debugger design methodology. An Embedded Debugger based on IEEE1149.1 has been developed. IEEE1149.1 protocol (JTAG) was for the interconnect test problem as the increasing of PCB's density at the very beginning, however, it had been comprehensively used in the design of simulator and debugger for its well functional extension and small amount of pins requirement. The embedded debugger module added the support to Tulip DSP Modified Harvard architecture with multiple buses, and implemented Lempel-Ziv algorithm in the design of trace unit. It can be used to start, stop, single-step, breakpoint and watchpoint the Tulip DSP, and it can also trace the instruction addresses during the functional mode. Through the simulation, the debugger has been proven to be a good debug support for Tulip DSP, and it has a better compression ratio than the debuggers before, raised the trace efficiency.
Keywords/Search Tags:IEEE1149.1, JTAG, Debugger, Lempel-Ziv Algorithm
PDF Full Text Request
Related items