I2c Bus, Jtag Bus In The Test Of Power Management Chips

The Power Management Unit chip is usually a combination of several LDO, DCD converter, Charger, and a simple digital state machine. The most part of the chip size is occupied by those analog modules. Thus, the test yield is very significant to the process of the foundry. The traditional test method under functional approach is very test time consuming and test coverage limited. So we need introduce some DfT method to improve the test coverage and reduce the test time simultaneously.I2C is serial communication bus which is very popular in most kinds of electrical applications nowadays. And JTAG is also very special and efficient as a international standard testing protocol.Some testing knowledge is roughly introduced at first part. And then it discusses many DfT solutions of the mixed-signal circuit under IEEE 1149 JTAG port. Finally, it takes PCF50XXX from NXP semiconductor as an example to implement relevant DfT solutions.