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Research On High Dynamic Range CMOS Image Sensor And Relevant Circuits Design

Posted on:2010-10-02Degree:MasterType:Thesis
Country:ChinaCandidate:Y H BianFull Text:PDF
GTID:2178360302459532Subject:Circuits and Systems
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This paper aims at researches on the extending methods of dynamic range of CMOS image sensor. It analyzed and concluded current popular methods of dynamic range extending, and select conditional reset technology as the core point of this paper. Based on the in-depth study of conditional reset technology, this paper improved the structure of index time sample conditional reset circuit. At the same time, this paper designed a new 12bit extended ADC for the column level ADC of index time sample conditional reset pixel.At first, this paper described the characteristics and equivalent mathematical model of photodiode, including circuit models and main noise models, and presented the derivation of key parameters of CMOS image sensor, such as SNR and DRF. After then, it analyzed the performance of index time sampling conditional reset pixel circuit.According to analysis, there are ineffective writing operations on SRAM in integrating period of pixel. This paper designed a novel mono-stable pulse generator to form a new writing model of SRAM, and ineffective writing operations are eliminated. A NMOS transistor working in sub-threshold region was settled in circuit to work as charge path of capacitance. Digital-analog mixed simulation was done for the whole pixel unit to prove the reliability of SRAM writing operation and photodiode's conditional resetting. The dynamic range of new type pixel unit is 12dB higher than regular conditional reset circuit, and average times of writing operation are reduced from 2-1/2N to 1.Considering the particularity of new pixel's output signal, this paper designed a new 12bit extended ADC (based on 8bit successive approximation ADC) to processing pixel's analog output and SRAM's digital value simultaneously. The key modules related to ADC designed in this paper included capacitive charge redistribution network DAC,hysteretic comparator and shift-SAR digital module. Simulation results prove that the ADC has a good linear output. At the end of this paper, it analyzed the ADC's performance in-depth such as offset error,integral nonlinearity and differential nonlinearity.
Keywords/Search Tags:CMOS image sensor, index time sampling conditional reset, mono-stable pulse, successive approximation AD
PDF Full Text Request
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