Design Of Wearable Computer' Multiprocessor Based On SOPC

Wearable Computer is a new concept of personal mobile computing systems. It is produced accompanied by the continuous development of the computer to the ultra-miniaturized computer.It is also the natural product of the concept "the computer should be people-oriented".SOPC is the certain outcome of programmable technique developing. As the technology of SOC and PLD/FPGA combined, integrated the advantages of both, adapt to the application domain of both. And because of its flexibility, it provides a good technology and wide application field to the intensely competitive IT market.Nios II microprocessor which is developed by Altera inc based on SOPC technology is a changeable, general RISC CPU. The developer can conveniently design the system by using SOPC Builder. The traditional multi-processor system based on the monolithic processor has complex structure and poor reliability,but the multi-processor system solutions based on 32 of the SOPC NiosII has fundamentally changed the design concepts and methods for multi-processor system.We can package the processors and other equipments in a SOPC chip using SOPC technology and this method can effectively reduce the size of wearable computer to meet the needs of the development of micro and small computer of the wearable computers.And packaging the whole system in a chip can effectively reduce the communication expenses, thereby reduce power consumption which meet the low-power design requirements of wearable computers .This method can also improve the speed, in particular, can reduce costs, can quickly generate the final product and effectively shorten the development cycle.This paper describes the use of SOPC technology to design a Wearable Computer System with three processors sharing resources, the main processor is mainly responsible for the running of the operating system and application software , the network processor is mainly responsible for handling messages, the DSP processor is mainly responsible for the processing of the video and image data. This article describes in detail the implementation mechanism of the multiprocessor system based on Nios II and FPGA,discusses the use of hardware mutex to realize multi-processor resource sharing and gives the specific steps for the design of the hardware, the design of the software ,testing methods and key technology. The paper introduces the structural features of the network processor Nios II and customized instructions and design methods for forwarding software of the network processor based on the Nios II soft-core processor and design methods for the DSP processor used for the processing of the video and image data. After verification, the three-processor system very well adapted to the wearable computer'micro and small and low-power design requirements.