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Design And Implementation Of Interface Between Modules Of BD2 Receiver

Posted on:2009-04-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y ZhouFull Text:PDF
GTID:2178360278964091Subject:Spatial Information Science and Technology
Abstract/Summary:PDF Full Text Request
BD2 baseband processing module can deal with all the satellite navigation signals at the same time, and the information processing module can solve the position, velocity and time. The information transferring of these two modules is realized by this interface.This paper analyzes the characteristics of communication datas of this interface, then choose SPI bus as communication line, and FIFO as cache, designs the interface circuit, communication protocol and information frame format according to its function and the characteristics of SPI bus and FIFO, and then based on the two difficulties (the conflicts between reading and writing and multi-channel election) of this project design, makes a detailed description of the design ideas and realization ways of the sending controller and receiving controller, which are the two main components of the interface. The sending controller consists of two core modules (main sending controlling module, multi-channel election module) and five external modules (flag creating module, sending FIFO controlling module, interrupt controlling module, status register controlling module, FIFO clearing module); the receiving controller makes up of three separate modules (receiving FIFO controlling module, main receiving controlling module, multi-channel election). These two controllers, combined with SPI bus and FIFO, achieve the information transferring between the baseband processing module and information processing module together.The interface between BD2 baseband processing module and information processing module has been realized and applied in multi-satellite navigation system terminal equipment. It works stably, with reliable performance and excellent ability of fault_tolerant, and could be expanded well.
Keywords/Search Tags:SPI bus, FIFO, Frame, sending controller, receiving controller
PDF Full Text Request
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