Design And Implementation Of The Low-Power DSP Multiply-Add-Fused Unit

Multiply-Add-Fused (MAF) Unit is one of the core computing components in high-performance microprocessor, its speed and power consumption have great effect on the performance of entire microprocessor. Research work on the Full-Custom mixed design, which are employed to implement the high-performance MAF, is of important practical significance and valuable in a wide range of applications.Multiply-Add-Fused Unit of X-DSP is studied and optimized in this thesis. Based on the architecture of MAF with reduced latency, and the methods of design optimization with Full-Custom design optimization, the design and optimization of MAF, which dramatically enhance the performance of MAF, is carried out at logic structure, circuit and layout level. In a 0.25 urn CMOS process, the results of layout simulation show that the power is 4.15mW and the frequency of the optimized MAF can reach 100 MHz, which meet the requirements of the project. The MAF is succeed in X-DSP.This thesis mainly contributes to the following aspects.1. A full-custom high performance 17 by 17-bit Booth recoded multiplier was implemented in 0.25μm CMOS process with a supply voltage of 2.5V and simulated using simulator (HSPICE). The multiplier of DSP implementations for Booth-2 Encoder and Wallace tree's structure have been proposed and simulated. The multiplier with high speed, low power for 17-bit fixed-point DSP. The active area is 0.248 mm2. The post-layout simulation shows the critical path with a delay of 3.558 ns, the power is 4.15mW.2. This paper finds that the operation of AxB+C is less frequency than the operation of AxB. We can turn off the data channels of+C. It can effectively reduce the static power. In order to achieve low-power operation, the multiplier was designed utilizing pass-transistor logic circuits. Impoving input data bus switches which only uses 3 pass-transistors can transfer strong "0 "and strong "1".3. The multiplier with regular layout for 17-bit fixed-point DSP is designed. Regular CPA (carry-propagate adder) layout can reduce power and area.